From 615cc2b7cf222deed55764bcd41a80c725d837af Mon Sep 17 00:00:00 2001
From: "Jakob L. Kreuze" <zerodaysfordays@sdf.lonestar.org>
Date: Wed, 1 Jan 2020 13:29:04 -0500
Subject: Implement CLS, RET, SYS, JP, and CALL

---
 main.myr | 47 +++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 41 insertions(+), 6 deletions(-)

diff --git a/main.myr b/main.myr
index b51de02..68aef16 100644
--- a/main.myr
+++ b/main.myr
@@ -54,16 +54,51 @@ const main = {
     var mem : uint8[memsz]
     var reg : uint8[regsz]
     var stk : uint16[stksz]
-    var I : uint16
-    var pc : uint16
-    var sp : uint16
-    var delay : uint8
-    var sound : uint8
+    var pc : uint16 = 0x200
+    var sp : uint16 = 0
+    var I : uint16 = 0
+    var delay : uint8 = 0
+    var sound : uint8 = 0
 
     clrscr(&gfx, scrsz)
-
     loadprg(&mem, "/home/jakob/Airplane.ch8")
 
+    var opcode, arg
+
+    while true
+        opcode = mem[pc]
+        arg = mem[pc + 1]
+        match (opcode & 0xf0) >> 4
+        | 0x0:
+            // CLS
+            if (opcode & 0x0f) == 0 && (arg & 0x0f) == 0
+                clrscr(&gfx, scrsz)
+            // RET
+            elif (opcode & 0x0f) == 0
+                if sp == 0
+                    std.die("stack underflow")
+                ;;
+                pc = stk[sp]
+                sp--
+            // SYS
+            else
+                std.die("RCA 1802 SYS unimplemted\n")
+            ;;
+        // JP
+        | 0x1:
+            pc = ((opcode & 0x0f) << 8) | arg
+        // CALL
+        | 0x2:
+            sp++
+            if sp > stksz
+                std.die("stack overflow")
+            ;;
+            stk[sp] = pc
+            pc = ((opcode & 0x0f) << 8) | arg
+        | _ : std.die("unimplemented opcode\n")
+        ;;
+    ;;
+
     sdl.update(tex, (gfx[:] : void#), 64)
     sdl.copy(r, tex)
     sdl.present(r)
-- 
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